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Cadence入门(二):plot漏电流与栅源电压关系图绘制技巧

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写在前面的话:这篇讲Cadence的入门。请各位牛人们不要浪费时间看这篇了哈!

接着上次的课程介绍:这次讲讲如何plot漏电流 和栅源电压之间的关系图。

Exercise 1B: Plot of Drain Current with Gate-to-Source Voltage

1. In the Analog Design Environment window, double click on the highlighted shown below.

2. Make the changes to the fields suggested shown below. Press OK.

3. In the Analog Design Environment window, click on the Netlist and Run button shown by the rectangle below.

4. The graph of drain current plotted with gate-to-source voltage will appear as shown.

Wonderful! Now, there is a homeJOY for you. Do obtain the family of curves when a parametric simulation is run for varying the values of body-to-source voltages. Pay attention to the changes to threshold voltage. The body-to-source voltage is taken to be zero for the simulation done above.

Take note: The threshold voltage changes with varying body-to-source voltage.

5. If you make the appropriate changes to the circuit and run the correct parametric simulation, you will get the family of curves shown below:

Well Done! You had completed the whole exercise on the characterization of NMOS device. However, if you cannot obtain the family of curves above or you have only 0.0001% of query, do ask your teaching assistant for advice and assistance. He is a wonderful person. I am not kidding with you. Never leave your doubts overnight.

Important Advice:

1. When you press the delete button on your keyboard, your mouse will always be in the delete mode. Now, if you press w for wiring, your mouse will STILL be in delete mode. So, you have to press the ESC button to neutralise your mouse before pressing w for the wiring mode.

2. In the schematic window, always REMEMBER to save your schematic by pressing Shift and x together. Otherwise, your simulation WILL not run.

Exercise 2: Characterization of PMOS Device

For this exercise, I will not guide you step-by-step. Do not be worried or upset. I strongly believe that the best way to learn Cadence tools is to keep doing and keep trying. However, no worries, I will always be around to assist YOU whenever you need any advice and assistance.

Like the saying goes: You Never Walk Alone.

Do create a new Cell View: Lab_2_PMOS.

There are 4 graphs to be plotted for this lab exercise:

· Drain Current with Drain-to-Source voltage

Drain Current with Drain-to-Source voltage - varying gate-to-source voltage(parametric)

Drain Current with Gate-to-Source voltage

Drain Current with Gate-to-Source voltage - varying body-to-source voltage(parametric)

Students are encouraged to check with the lab professor or teaching assistant to confirm that they had obtained the correct graph.

Take Note: The model name of PMOS is epm which can be found in xx library. (你所用的对应library里的pmos 名称)

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